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Research Directions in Direct Cache Access (DCA) for I/O

November 3, 2006

  • Date: Friday, November 3rd, 2006 
  • Time: 1 pm — 2:15 pm 
  • Place: ME 218

Ram Huggahalli & Amit Kumar
Corporate Technology Group, Intel

Abstract The heart of this presentation will be our ISCA 2005 paper on ‘Direct Cache Access (DCA) for High Bandwidth Network I/O’. The context of our research work is recent I/O technologies such as PCI-Express and 10Gb Ethernet that enable unprecedented levels of I/O bandwidths in mainstream platforms. We observe that in traditional platforms, memory latency alone can limit the current architecture from matching 10 Gb inbound network I/O traffic. We propose a platform-wide method called Direct Cache Access (DCA) to deliver inbound I/O data directly into processor caches. We demonstrate that DCA provides a significant reduction in memory latency and memory bandwidth for receive intensive network I/O applications.

In this presentation, we will also present subsequent findings from a real-silicon prototype of Direct Cache Access for a dual-ported GbE NIC. Architectural directions for future usage models, related coherence protocols and their role in platform I/O performance will be reviewed.

Ram Huggahalli Ram Huggahalli is a Network Systems Architect in Communication Technology Lab (CTL), an advanced development and research lab in Intel’s Corporate Technology Group. He has 15 years of experience in x86 processors, client/server systems architecture and in new technology evaluation in the areas of memory, graphics and networking. Ram’s recent research efforts involved adapting Intel platforms to network protocol processing at multi-10GbE rates. He has an MS degree in Electrical Engineering and also in Engineering Management from the University of Missouri.

Amit Kumar Amit Kumar is a Research Software Engineer in Communication Technology Lab (CTL), an advanced development and research lab in Intel’s Corporate Technology Group. Amit has more than 4 years of experience is system software specializing in embedded and real-time systems programming and kernel programming. His current research explores network stack architecture and its relationship to memory hierarchies in general purpose computer systems. He has an MS degree in Computer Science.